The increasing levels of integration on modern IC's require comensurate increases on the I/O bandwidth of these ICs. This talk outlines the evolution of signaling and clocking techniques as per pin bandwidths increase from the Mbit to the Gbit range. Particular emphasis is given to contemporary techniques in Clock and Data Recovery as well as Equalization. The talk concludes by describing implementation trade-offs in four contemporary interfaces: Rambus (parallel-memory), SPI4.2 (parallel-datacom), SATA (serial-storage) and XFI (serial-datacom).
(This is an introductory lecture presented as part of a day-long course at the 2004 VLSI Circuits Symposium)