Institute of Computer Science-FORTH

[ICS-2390] Call for expression of interest for one (1) position of Software Engineer for the development of an intelligent interactive system in the Institute of Computer Science (ICS)- (FORTH)

The candidate will participate in the R&D work of FORTH within the GENAI4ED project. We are seeking an experienced developer to join our team in designing and implementing a versatile, AI-tool-agnostic data framework.

Laboratory: CBML

Date of announcement: 30-07-2025

Closing date: 11-08-2025, 16:00

[ICS-2389] Δύο (2) θέσεις έκτακτου προσωπικού για Μηχανικό Λογισμικού με ΜΔΕ στην Πληροφορική & Συγγραφέα σεναρίων-Δημοσιογράφο με Πτυχίο ΑΕΙ στον κινηματογράφο

Ανάπτυξη εφαρμογών και περιεχομένου σε περιβάλλοντα διάχυτης νοημοσύνης.

Laboratory: HCI

Date of announcement: 29-07-2025

Closing date: 08-08-2025, 16:00

[ICS-2388] Πλήρωση μίας (1) θέσης έκτακτου προσωπικού για κάτοχο Διδακτορικού Διπλώματος Αρχαιολογίας

Στο πλαίσιο της υλοποίησης του έργου «Advancing Artificial Intelligence and 5 Dimensional Space Based Methodologies for Monitoring Cultural Heritage – AI-SPACE HERITAGE», το Ινστιτούτο Πληροφορικής του Ιδρύματος Τεχνολογίας και Έρευνας (ΙΠ-ΙΤΕ) προτίθεται να απασχολήσει έκτακτο προσωπικό για μία (1) θέση κατόχου Διδακτορικού Διπλώματος Αρχαιολογίας , με το οποίο θα συναφθεί σύμβαση εργασίας ορισμένου χρόνου ή μίσθωσης έργου και αντικείμενο την "Αρχαιολογική επισκόπηση υποψήφιων περιοχών για ανασκαφική διερεύνηση."

Laboratory: CVRL

Date of announcement: 28-07-2025

Closing date: 07-08-2025, 16:00

[ICS-2387] Call for expression of interest for one (1) post doctoral part-time position "Similarity search techniques in large data collections"

The aim is to address the challenges of processing large-scale time series collections that arise from real-world applications. Large-scale time series datasets are now encountered in nearly every scientific and social domain. The person will design and implement a collection of algorithms, data structures, and mechanisms to tackle the scalability problem in the analysis of massive time series data, leveraging modern and emerging hardware technologies. The algorithms, data structures, and mechanisms developed will form a powerful library, thus ensuring their easy and efficient use by a wide range of applications whose performance heavily relies on the effective processing of large-scale time series data.

Laboratory: SPL

Date of announcement: 24-07-2025

Closing date: 08-08-2025, 16:00

[ICS-2386] Call for expression of interest for a position of a Biostatistician in the Institute of Computer Science (ICS) Foundation for Research and Technology – Hellas (FORTH)

The candidate will participate in the R&D work of FORTH within the MULTIPULM project. We are looking for a biostatistician to be part of a multidisciplinary team, designing and supporting the management of the data generated during the project, analysing existing data.

Laboratory: CBML

Date of announcement: 23-07-2025

Closing date: 04-08-2025, 16:00

[ICS-2385] Call for expression of interest for one (1) R&D Computer Scientist in the Institute of Computer Science (ICS) Foundation for Research and Technology – Hellas (FORTH)

We seek one (1) R&D Computer Scientist. The candidate will participate in the R&D activities of FORTH in the context of the projects xShare and C-SOC.

Laboratory: Discs

Date of announcement: 23-07-2025

Closing date: 04-08-2025, 16:00

[ICS-2384] Call for expression of interest for one (1) R&D Computer Scientist in the Institute of Computer Science (ICS) Foundation for Research and Technology – Hellas (FORTH)

We seek one (1) R&D Computer Scientist. The candidate will participate in the R&D activities of FORTH in the context of the project C-SOC.

Laboratory: Discs

Date of announcement: 23-07-2025

Closing date: 04-08-2025, 16:00

Archive

[ICS-2243] Call for expression of interest for one (1) position for R&D Engineers with a degree in Computer Science or Computer Engineering, in the Institute of Computer Science (ICS) Foundation for Research and Technology – Hellas (FORTH)

We seek one (1) recent graduate Engineer with a degree in Computer Science or Computer for our team. The candidate will participate in the R&D activities of FORTH in the context of the EC-funded project RISER. The RISER project will develop and validate open-source designs for standardized form-factor system platforms suitable for supporting cloud services, featuring RISC-V processor chips from contemporary European initiatives.

Laboratory: CARV

Date of announcement: 28-08-2024

Closing date: 09-09-2024, 16:00

Available Results :

Results
DIAVGEIA Search Number: (https://diavgeia.gov.gr with ADA: 95ΔΦ469ΗΚΥ-Δ21)

[ICS-2242] Πλήρωση μίας (1) θέσης έκτακτου προσωπικού «Διαχείριση έργων έρευνας και ανάπτυξης» μέσω σύναψης σύμβασης εργασίας ιδιωτικού δικαίου ορισμένου χρόνου πλήρους απασχόλησης

Στο πλαίσιο της υλοποίησης της Πράξης α) «Fostering Artificial Intelligence Trust for Humans towards the optimization of trustworthiness through large-scale pilots in critical domains (FAITH)» με κωδικό GA101135932, και β) «Improve Safety in Polymedication by Managing Drug-Drug-Gene Interactions (SafePolyMed) με κωδικό GA 101057639., το Ινστιτούτο Πληροφορικής του Ιδρύματος Τεχνολογίας και Έρευνας (ΙΠ-ΙΤΕ), προτίθεται να απασχολήσει έκτακτο προσωπικό για την πλήρωση μίας θέσης έκτακτου προσωπικού «Διαχείριση έργων έρευνας και ανάπτυξης» μέσω σύναψης σύμβασης εργασίας ιδιωτικού δικαίου ορισμένου χρόνου πλήρους απασχόλησης και αντικείμενο τη διαχείριση έργων έρευνας και ανάπτυξης.
ΑΠΟΦΑΣΗ ΠΑΡΑΤΑΣΗΣ

Laboratory: CBML

Date of announcement: 27-08-2024

Closing date: 20-09-2024, 16:00

Available Results :

Results
DIAVGEIA Search Number: (https://diavgeia.gov.gr with ADA: 98ΞΙ469ΗΚΥ-Φ1Ρ)

[ICS-2241] Μία (1) θέση έκτακτου προσωπικού για Κάτοχο Μεταπτυχιακού τίτλου σπουδών στο πεδίο της απομόνωσης και σύνθεσης φυσικών προϊόντων με βιολογική δραστικότητα

Αξιολόγηση αποτελεσματικότητας και τοξικότητας χημικών δομών για κλινικές δοκιμές.

Laboratory: ISL

Date of announcement: 26-08-2024

Closing date: 05-09-2024, 16:00

Available Results :

Results
DIAVGEIA Search Number: (https://diavgeia.gov.gr with ADA: 6ΗΑΕ469ΗΚΥ-Φ97)

[ICS-2240] Call for expression of interest for one (1) position of Hardware R&D Engineer, in the Institute of Computer Science (ICS) Foundation for Research and Technology – Hellas (FORTH)

We seek one (1) Hardware R&D Engineer for our team. The candidates should have proven experience with hardware design and FPGA prototyping. The candidate will participate in the R&D activities of FORTH-ICS in the context of the H2020-JTI-EuroHPC project The European PILOT. Accelerators provide the majority of performance in modern High-Performance Computing (HPC) systems and are the fundamental building blocks for Exascale systems. The European PILOT (Pilot using Independent Local & Open Technology) will be the first demonstration of two ALL European HPC and High-Performance Data Analytics (HPDA) (AI, ML, DL) accelerators, designed, implemented, manufactured, and owned by Europe. The European PILOT combines open-source software (SW) and open and proprietary hardware (HW) to deliver the first completely European full stack software, accelerator, and integrated ecosystem based on RISC-V accelerators coupled to any general purpose processor (CPU) via PCIe Gen 6.0 or CXL 3.0. This pilot will demonstrate key HPC and HPDA workloads and software stacks. The European PILOT is also the first to demonstrate an ALL European HPC ecosystem. The accelerators will be manufactured in the new European GlobalFoundries 12 nm advanced silicon technology, a major demonstration of European technology independence. The European PILOT combines cutting edge research utilizing SW/HW co-design to demonstrate HPC and HPDA accelerators running key applications and libraries in a full software stack including middleware, runtimes, compilers, and tools for the emerging RISC-V ecosystem. The European PILOT is able to produce a full stack (SW and HW) research prototype by leveraging and extending the work done in multiple European projects like: EPI, MEEP, POP2 CoE, EuroEXA, and ExaNeSt. This pre-production system can only be realized with a combination of existing IP, HW emulation using FPGAs, and real ASIC prototypes that demonstrate the full stack feasibility of the hardware and software. Finally, while the applications we use span AI to HPC, the aggressive ASIC implementation (chiplet size and small geometry) will be the smallest technology node manufactured in Europe and can easily be adapted for a near-future HPC implementation.

Laboratory: CARV

Date of announcement: 23-08-2024

Closing date: 02-09-2024, 16:00

Available Results :

Results
DIAVGEIA Search Number: (https://diavgeia.gov.gr with ADA: ΨΗ5Ε469ΗΚΥ-ΨΚΝ)

[ICS-2239] Call for expression of interest for one (1) position of Experienced Hardware R&D Engineer, in the Institute of Computer Science (ICS) Foundation for Research and Technology – Hellas (FORTH)

We seek one (1) Experienced Hardware R&D Engineer for our team. The candidate should have proven multi-year experience on hardware RTL design, integration and validation with a background in European Research Projects. The candidates will participate in the R&D activities of FORTH in the context of the EuroHPC JU project EPI-SGA2. The European Processor Initiative develops a roadmap for future European high-performance low power processors aligned with the EuroHPC roadmap. EPI focuses on processor technologies based on ARM ISA and architecture for covering the short-term needs and HPC accelerator technologies based on RISC-V, the open-source ISA. RISC-V is also candidate to become the Europa’s own technologies for covering long term objectives. SGA2 also seeks to expand the scope of the project into adjacent European and global vertical markets that can leverage HPC to enable new and improved systems and solutions. The EPI SGA2 proposal, built on top of EPI SGA1 represents the second step toward the implementation of this roadmap. SGA2 has a three-year duration with the following objectives: a) Finalize the development and the bring-up of the first generation of low-power processor units developed in SGA1, b) Develop the second generation of the General Purpose Processor (GPP) applying technological enhancements targeting the European Exascale machines with respect to the GPP (Rhea) of SGA1, c) Develop the second generation of low power accelerator test chips, usable by the HPC community for tests and finally d) Develop sound and realistic industrialisation & commercialisation paths and enable the long-term economical sustainability with an industrialization path in the edge computing area, demonstrated in a few well-chosen proof of concepts like autonomous shuttles or video surveillance.

Laboratory: CARV

Date of announcement: 23-08-2024

Closing date: 02-09-2024, 16:00