Job Opportunities

[ICS-1372] One (1) position for Hardware Digital Designer (part-time) in the EuroEXA project
We seek one part-time Hardware Digital Designer for our team. The candidate will participate in the R&D activities of FORTH in the context of the project EuroEXA: Co-designed Innovation and System for Resilient Exascale Computing in Europe: From Applications to Silicon. EuroEXA brings a holistic foundation from multiple European HPC projects and partners. We co-design a balanced architecture for both compute- and data-intensive applications using a cost-efficient, modular-integration approach enabled by novel inter-die links and the tape-out of a resulting EuroEXA processing unit with integration of FPGA for data-flow acceleration. We provide a homogenised software platform offering heterogeneous acceleration with scalable shared memory access and create a unique hybrid geographically-addressed, switching and topology interconnect within the rack while enabling the adoption of low-cost Ethernet switches offering low-Latency and high-switching bandwidth. Working together with a rich mix of key HPC applications from across climate/weather, physics/energy and life-science/bioinformatics domains we will demonstrate the results of the project through the deployment of an integrated and operational peta-flop level prototype hosted at STFC. Supported by 2 run-to-completion platform-wide resilience mechanisms, components will manage local failures, while communicating with higher levels of the stack. Monitored and controlled by advanced runtime capabilities, EuroEXA will demonstrate its co-design solution supporting both existing pre-exascale and project-developed exascale applications.
Laboratory: CARV
Date of announcement: 09-05-2019
Closing date: 24-05-2019
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[ICS-1355] Two (2) full-time (ESR) Research Assistant positions on Cyber Security and Privacy.
The positions are for three (3) years. The positions are funded by the European Commission under the Marie Curie Initial Training Network (ITN) program RAIS, which focuses on the design of decentralized, scalable and secure collective awareness platforms for real-time data analytics and machine learning, which preserve end-user privacy and information ownership. The first position is for Mitigation of Cyberattacks in Wearable Devices and the second position is for Decentralized Privacy-preserving Data Sharing. The RAIS consortium aspires to establish a fertile multidisciplinary research and innovation community with strong entrepreneurial culture that will advance wearable sport-sensing and quantified-self devices and accompanying middleware. The main objective of the RAIS Initial Training Network is to provide world class training for a next generation of researchers, data scientists, and Web engineers, emphasizing on a strong combination of advanced understanding in both theoretical and experimental approaches, methodologies and tools that are required to develop Decentralized Platforms for Real-Time Data Analytics.
Laboratory: DCS
Date of announcement: 15-04-2019
Closing date: 31-12-2019
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