Jobs

[ICS-2287] Call for expression of interest for a position of a Software Engineer, expert in the validation of data-driven AI models
The candidate will participate in the R&D work of FORTH within the Althea project. We are looking Software Engineer, to be part of the team designing, implementing and testing a number of data driven AI models in the wider cancer imaging domain.
Laboratory: CBML
Date of announcement: 27-11-2024
Closing date: 09-12-2024
[ICS-2286] Call for expression of interest for one (1) position of a student enrolled to a University MSc Program in Computer Science or Computer Engineering or Electrical Engineering
We seek one (1) student enrolled to a University MSc Program in Computer Science or Computer Engineering or Electrical Engineering. The candidate will participate in the R&D activities of FORTH in the context of the EuroHPC JU-funded project NET4EXA. The NET4EXA project aims to create an advanced interconnect, which will scale to hundreds of thousands of computing nodes and will support modern HPC systems that are designed for massive AI tasks, such as the training of Large Language Models. The interconnect forms the backbone of such systems, and their overall performance is intimately tied to the scalability of the network and its tight coupling with the high-end compute elements.
Laboratory: CARV
Date of announcement: 25-11-2024
Closing date: 05-12-2024
[ICS-2272] ICS Director
Announcement for the position of Director, Institute of Computer Science (in greek only)
Date of announcement: 06-11-2024
Closing date: 20-01-2025
[ICS-2258] Μία (1) θέση έκτακτου προσωπικού για Κάτοχο Διδακτορικού τίτλου σπουδών στην Επιστήμη Υπολογιστών /Πληροφορική ή σε συναφές τομέα
Παράλληλοι και κατανεμημένοι αλγόριθμοι και δομές δεδομένων για μοντέρνες υπολογιστικές πλατφόρμες.
ΑΠΟΦΑΣΗ ΠΑΡΑΤΑΣΗΣ
Laboratory: CARV
Date of announcement: 15-10-2024
Closing date: 06-12-2024
[ICS-2248] Πλήρωση μίας (1) θέσης έκτακτου προσωπικού με σύμβαση εργασίας ορισμένου χρόνου ή μίσθωσης έργου και αντικείμενο τις
Στο πλαίσιο της υλοποίησης του έργου ΕΛ.ΙΔ.Ε.Κ. με τίτλο «How to compute in Persistent Memory Systems» με Ακρωνύμιο: PERSIST, και Proposal ID: 03684, που χρηματοδοτείται στο πλαίσιο της «2ης Προκήρυξης Ερευνητικών Έργων ΕΛ.ΙΔ.Ε.Κ. για την ενίσχυση Μελών ΔΕΠ και Ερευνητών/τριών», το Ινστιτούτο Πληροφορικής του Ιδρύματος Τεχνολογίας και Έρευνας (ΙΠ-ΙΤΕ) προτίθεται να απασχολήσει έκτακτο προσωπικό, και αντικείμενο «Παράλληλες και κατανεμημένες δομές δεδομένων και αλγόριθμοι για μοντέρνες υπολογιστικές πλατφόρμες.», με το οποίο θα συναφθούν συμβάσεις εργασίας ορισμένου χρόνου ή μίσθωσης έργου
ΑΠΟΦΑΣΗ ΠΑΡΑΤΑΣΗΣ
Laboratory: CARV
Date of announcement: 16-09-2024
Closing date: 20-12-2024

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[ICS-2242] Πλήρωση μίας (1) θέσης έκτακτου προσωπικού «Διαχείριση έργων έρευνας και ανάπτυξης» μέσω σύναψης σύμβασης εργασίας ιδιωτικού δικαίου ορισμένου χρόνου πλήρους απασχόλησης
Στο πλαίσιο της υλοποίησης της Πράξης α) «Fostering Artificial Intelligence Trust for Humans towards the optimization of trustworthiness through large-scale pilots in critical domains (FAITH)» με κωδικό GA101135932, και β) «Improve Safety in Polymedication by Managing Drug-Drug-Gene Interactions (SafePolyMed) με κωδικό GA 101057639., το Ινστιτούτο Πληροφορικής του Ιδρύματος Τεχνολογίας και Έρευνας (ΙΠ-ΙΤΕ), προτίθεται να απασχολήσει έκτακτο προσωπικό για την πλήρωση μίας θέσης έκτακτου προσωπικού «Διαχείριση έργων έρευνας και ανάπτυξης» μέσω σύναψης σύμβασης εργασίας ιδιωτικού δικαίου ορισμένου χρόνου πλήρους απασχόλησης και αντικείμενο τη διαχείριση έργων έρευνας και ανάπτυξης.
ΑΠΟΦΑΣΗ ΠΑΡΑΤΑΣΗΣ

Laboratory: CBML
Date of announcement: 27-08-2024
Closing date: 20-09-2024
[ICS-2241] Μία (1) θέση έκτακτου προσωπικού για Κάτοχο Μεταπτυχιακού τίτλου σπουδών στο πεδίο της απομόνωσης και σύνθεσης φυσικών προϊόντων με βιολογική δραστικότητα
Αξιολόγηση αποτελεσματικότητας και τοξικότητας χημικών δομών για κλινικές δοκιμές.
Laboratory: ISL
Date of announcement: 26-08-2024
Closing date: 05-09-2024
Available Results :
Results
DIAVGEIA Search Number: (https://diavgeia.gov.gr with ADA: 6ΗΑΕ469ΗΚΥ-Φ97)
[ICS-2240] Call for expression of interest for one (1) position of Hardware R&D Engineer, in the Institute of Computer Science (ICS) Foundation for Research and Technology – Hellas (FORTH)
We seek one (1) Hardware R&D Engineer for our team. The candidates should have proven experience with hardware design and FPGA prototyping. The candidate will participate in the R&D activities of FORTH-ICS in the context of the H2020-JTI-EuroHPC project The European PILOT. Accelerators provide the majority of performance in modern High-Performance Computing (HPC) systems and are the fundamental building blocks for Exascale systems. The European PILOT (Pilot using Independent Local & Open Technology) will be the first demonstration of two ALL European HPC and High-Performance Data Analytics (HPDA) (AI, ML, DL) accelerators, designed, implemented, manufactured, and owned by Europe. The European PILOT combines open-source software (SW) and open and proprietary hardware (HW) to deliver the first completely European full stack software, accelerator, and integrated ecosystem based on RISC-V accelerators coupled to any general purpose processor (CPU) via PCIe Gen 6.0 or CXL 3.0. This pilot will demonstrate key HPC and HPDA workloads and software stacks. The European PILOT is also the first to demonstrate an ALL European HPC ecosystem. The accelerators will be manufactured in the new European GlobalFoundries 12 nm advanced silicon technology, a major demonstration of European technology independence. The European PILOT combines cutting edge research utilizing SW/HW co-design to demonstrate HPC and HPDA accelerators running key applications and libraries in a full software stack including middleware, runtimes, compilers, and tools for the emerging RISC-V ecosystem. The European PILOT is able to produce a full stack (SW and HW) research prototype by leveraging and extending the work done in multiple European projects like: EPI, MEEP, POP2 CoE, EuroEXA, and ExaNeSt. This pre-production system can only be realized with a combination of existing IP, HW emulation using FPGAs, and real ASIC prototypes that demonstrate the full stack feasibility of the hardware and software. Finally, while the applications we use span AI to HPC, the aggressive ASIC implementation (chiplet size and small geometry) will be the smallest technology node manufactured in Europe and can easily be adapted for a near-future HPC implementation.
Laboratory: CARV
Date of announcement: 23-08-2024
Closing date: 02-09-2024
Available Results :
Results
DIAVGEIA Search Number: (https://diavgeia.gov.gr with ADA: ΨΗ5Ε469ΗΚΥ-ΨΚΝ)
[ICS-2239] Call for expression of interest for one (1) position of Experienced Hardware R&D Engineer, in the Institute of Computer Science (ICS) Foundation for Research and Technology – Hellas (FORTH)
We seek one (1) Experienced Hardware R&D Engineer for our team. The candidate should have proven multi-year experience on hardware RTL design, integration and validation with a background in European Research Projects. The candidates will participate in the R&D activities of FORTH in the context of the EuroHPC JU project EPI-SGA2. The European Processor Initiative develops a roadmap for future European high-performance low power processors aligned with the EuroHPC roadmap. EPI focuses on processor technologies based on ARM ISA and architecture for covering the short-term needs and HPC accelerator technologies based on RISC-V, the open-source ISA. RISC-V is also candidate to become the Europa’s own technologies for covering long term objectives. SGA2 also seeks to expand the scope of the project into adjacent European and global vertical markets that can leverage HPC to enable new and improved systems and solutions. The EPI SGA2 proposal, built on top of EPI SGA1 represents the second step toward the implementation of this roadmap. SGA2 has a three-year duration with the following objectives: a) Finalize the development and the bring-up of the first generation of low-power processor units developed in SGA1, b) Develop the second generation of the General Purpose Processor (GPP) applying technological enhancements targeting the European Exascale machines with respect to the GPP (Rhea) of SGA1, c) Develop the second generation of low power accelerator test chips, usable by the HPC community for tests and finally d) Develop sound and realistic industrialisation & commercialisation paths and enable the long-term economical sustainability with an industrialization path in the edge computing area, demonstrated in a few well-chosen proof of concepts like autonomous shuttles or video surveillance.
Laboratory: CARV
Date of announcement: 23-08-2024
Closing date: 02-09-2024
Available Results :
Results
DIAVGEIA Search Number: (https://diavgeia.gov.gr with ADA: ΡΦΧΠ469ΗΚΥ-ΤΟ0)
[ICS-2238] Μία (1) θέση έκτακτου προσωπικού για Μηχανικό Λογισμικού με Πτυχίο Ανώτατης Εκπαίδευσης
Εργασίας Ε4.1 Οπτικοποίηση δεδομένων & Ε4.2 Διαδικτυακές Εφαρμογές πρόσβασης Χρηστών και Πίνακες Ελέγχου (Παραδοτέα: Π4.1. Διαδικτυακές Εφαρμογές πρόσβασης Χρηστών).
Laboratory: ICS
Date of announcement: 31-07-2024
Closing date: 22-10-2024
Available Results :
Results
DIAVGEIA Search Number: (https://diavgeia.gov.gr with ADA: ΨΤΒ0469ΗΚΥ-1ΟΑ)

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