Computer Architecture and VLSI Systems (CARV) Laboratory
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The Computer Architecture and VLSI Systems
(CARV) Laboratory of the Institute of Computer Science (ICS),
FORTH, conducts Research and Development in the:
Our work aims at addressing realistic problems in real systems, thus heavily relying on experimental setups to demonstrate the validity of our ideas and the viability of our solutions. As part of such work, state-of-the-art prototypes and infrastructures have been and continue to be built. Information Systems are built with technology layers (levels of abstraction). The upper layers are based on the lower ones, and the "raison d'être" of the layers below is to support and make possible the layers on top. Roughly, from bottom to top, these layers are: (1) Physics, Chemistry, Materials; (2) Nanoelectronics, IC Fabrication; (3) VLSI, Electronic Design Automation (EDA); (4) Digital Systems Architecture; (5) Systems Software; ( 6) Applications Software; (7) Services. The CARV Laboratory addresses the three middle layers: |
ICS
Member of:
European
Network of Excellence on
High-Perfomance Embedded Architecture and Compilation http://www.hipeac.net |
VLSI Design - Electronic Design Automation (EDA) |
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| All modern information technology relies on Very Large Scale Integrated (VLSI) Circuits, which have grown to be extremely complex to design, needing sophisticated Computer-Aided Design (CAD) tools. Our current work in this domain emphasizes Timing Methodologies for VLSI systems, because this will be a major issue in future systems, due to very high clock frequencies, manufacturing variability, power consumption, and EMI emissions. Asynchronous techniques have been investigated, since they lie at the basis of the most promising solutions. Commercial EDA tools have been adapted to the use of asynchronous techniques, with excellent research results and good potential of application to real industrial projects. For more information, click on "Asynchronous Circuits and Systems" on the left menu. | 
Asynchronous processor test
chip, fully functional on first silicon (2005) |
Digital Systems Architecture |
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| The central open question for the architecture of modern computer, storage, communication, and networking hardware is how to make Scalable Systems --systems made out of building blocks, where one can increase performance by using more components, or reduce cost by using less components. Scalable systems architecture relies on Interconnection Networks, which has been a main R&D topic for our Lab over the past 20 years. Current emphasis is on buffered crossbar switches, and on flow and congestion control for the future switching fabrics made out of emerging commodity switches. In addition, Network Interface (NIC) architectures are an essential component of future interconnects, and a research topic of revived interest in our Lab. For more information, click on "Packet Switch Architecture" on the left menu. | 
High-speed interconnects experiemntal prototyping set-up |
Systems Software |
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| Systems Software (run-time systems & OS, compilers, middleware) goes hand-in-hand with hardware architecture in achieving the efficient operation of information systems. The Scalable Systems described above critically rely on run-time software, which is the focus of our work. We concentrate on clusters of commodity components because they can scale to very large numbers of processors. In particular, we work on low-latency, high-bandwidth communication subsystems, block-level storage architectures, storage virtualization, storage access protocols, computer systems dependability and security support (networked storage security, system reliability and availability, network interface support for security-sensitive applications), and, more recently, on device miniaturization and sensor networks. For more information, click on "Scalable Systems & Networks" on the left menu. | 
Experimental multi-processor
cluster under construction |
