Date: 30 June 2016 Time: 16:00-17:00
Host: Prof. Manolis Katevenis
For decades, CMOS technology provided exponential improvements in transistor density and energy consumption, allowing hardware architects to focus on removing picoseconds from processor clock cycles and adding megabytes to on-chip caches. Unfortunately, we are now in a phase where transistor cost and energy consumption are barely scaling. Consequently, the new name of the game is accounting for and optimizing every picojoule the hardware consumes. This talk will describe the challenges and opportunities in designing high performance, yet energy efficient systems. Specifically, we will discuss hardware and software specialization and raising utilization in datacenter systems. While these approaches represent a non-trivial departure from the way we design and use systems today, combined they can provide improvements equivalent to a few decades of Moore's law scaling.
Christos is a professor of Computer and Communication Sciences at EPFL (Switzerland) and an associate professor of Computer Science and Electrical Engineering at Stanford University (USA). His research currently focuses on hardware and software techniques for resource efficient cloud computing. He is a member of the Pervasive Parallelism and Platform Labs at Stanford, two multi-faculty effort aiming improving the practicality and efficiency of multi-core and datacenter computing respectively. Christos holds a PhD degree from the University of California at Berkeley (USA) and a BS degree from the University of Crete (Greece). He is an IEEE fellow, a senior member of the ACM, and the recipient of distinctions such as the ACM Maurice Wilkes award and the NSF Career award.