Reconfigurable Network Processing Platforms
Speaker: Christoforos Kachris.
Date: 17 November 2008 Time: 12:00-13:30
Location: "Mediterranean Studies" Seminar Room, FORTH. Heraklion, Crete
Host: Manolis Katevenis


The rapid increase of network traffic and network processing complexity requires the design of more efficient network devices. Specifically, devices located at edge and access nodes (e.g., edge routers and content switches) require a blend of performance and flexibility in order to meet the network processing requirements. A reconfigurable network processing platform is presented that can be adapted to diverse network processing requirements and traffic fluctuations.

The inherent FPGA's programmability at the software and hardware level is exploited to design high performance adaptive network devices such as edge routers and content switches. The performance evaluation of the systems shows that reconfigurable hardware-based network processing platforms are most suitable for edge, access and enterprise network devices, since they can efficiently meet these devices requirements in terms of performance, power and flexibility.


Christoforos Kachris holds Ph.D. from the Delft University of Technology, and a Diploma and a M.Sc. from the Electronic and Computer Engineering Department (Technical University of Crete).

In 2003, Christoforos joined Ellemedia Technologies, Athens, as a research and design engineer, where he worked in several European Union research projects in the area of network processing and reconfigurable computing. In 2006, he worked as an intern research engineer in the Network Group of Xilinx Research Labs, in San Jose, CA.

His current research interests include: reconfigurable computing, network processing, image and video processing, embedded systems, multi-processor SoCs, and computer architecture.

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