ICS Publications - CARV

Periodicals (79)

    Journal Articles

  1. Fatourou, P., Nikolakopoulos, Y., & Papatriantafilou, M. (2017). Linearizable Wait-Free Iteration Operations in Shared Double-Ended QueuesParallel Processing Letters27(2), World Scientific.
  2. Fatourou, P., & Kallimanis, N. (2017). Lower and upper bounds for single-scanner snapshot implementationsDistributed Computing30(4), 231-260, Springer .
  3. Charitopoulos, G., Koidis, L., Papadimitriou, K., & Pnevmatikatos, D. (2017). Run-time management of systems with partially reconfigurable FPGAsIntegration, the VLSI Journal57, 34-44, Elsevier.
  4. Theodoropoulos, D., Mazumdar, S., Ayguade, E., Bettin, N., Bueno, J., Ermini, S., Filgueras, A, Jimenez-Gonzalez, D., Alvarez-Martinez, C., Martorell, X., Montefoschi, F., Oro, D., Pnevmatikatos, D., Rizzo, A., Gai, P., Garzarella, S., Morelli, B., Pomella, A., & Giorgi , R. (2017). The AXIOM platform for next-generation cyber physical systemsMicroprocessors and Microsystems52(July), 540-555, Elsevier.
  5. Papagiannis, A., Saloustros, G., Marazakis, M., & Bilas, A. (2016). Iris: An optimized I/O stack for low-latency storage devicesACM SIGOPS Operating Systems Review50(3), 3-11, ACM.
  6. Chrysos, N., Chen, L., Kachris, C., & Katevenis , M. (2016). Discharging the Network From Its Flow Control Headaches: Packet Drops and HOL BlockingIEEE/ACM Transactions on Networking 24(1), 15-28, IEEE.
  7. Gonzalez-Ferez, P., & Bilas, A. (2016). Mitigation of NUMA and synchronization effects in high-speed network storage over raw EthernetThe Journal of Supercomputing72(11), 4129-4159, Springer .
  8. Giorgi , R., Mazumdar, S., Viola, S., Gai, P., Garzarella, S., Morelli, B., Pnevmatikatos, D., Theodoropoulos, D., Alvarez , C., Ayguade, E., Bueno, J., Filgueras, A, Jimenez-Gonzalez, D., & Martorell, X. (2016). Modeling Multi-board Communication in the AXIOM Cyber-Physical System. Ada User Journal37(4), 228-235.
  9. Alvarez , C., Ayguade, E., Bosch , J., Bueno, J., Cherkashin, A., Filgueras, A, Jimenez-Gonzalez, D., Martorell, X., Navarro, N., Vidal, M., Theodoropoulos, D., Pnevmatikatos, D., Catani, D., Oro, D., Fernandez, C., Segura , C., Rodriguez Saeta, J., Hernando, J., Scordino, C., Gai, P., Passera, P., Pomella, A., Bettin, N., Rizzo, A., & Giorgi , R. (2016). The AXIOM software layersMicroprocessors and Microsystems47 Part B, 262-277, Elsevier.
  10. Ellen, F., Fatourou, P., Kosmas, E., Milani, A., & Travers, C. (2016). Universal Constructions that Ensure Disjoint-Access Parallelism and Wait-FreedomDistributed Computing 29(4), 251-277, Springer.
  11. Fatourou, P., Kanellou, E.K., & Eleftherios , K. , Rabbi, M. F. (2016). WFR-TM: Wait-free readers without sacrificing speculation of writersJournal of Parallel and Distributed Computing96, 134-151, Springer .
  12. Pnevmatikatos, D., Papadimitriou, K., Becker, T., Böhm , P., Brokalakis, A., Bruneel, K., Ciobanu, C.B., Davidson, T., Gaydadjiev, G., Heyse, K., Luk, W., Niu, X., Papaefstathiou, I., Pau, D., Pell, O., Pilato, C., Santambrogio, M.D., Sciuto, D., Stroobandt, D., Todman, T., & Vansteenkiste, E. (2015). FASTER: Facilitating Analysis and Synthesis Technologies for Effective ReconfigurationMicroprocessors and Microsystems39(4-5), 321-338, Elsevier.
  13. Passas, G., Katevenis, M.G.H., & Pnevmatikatos, D. (2015). The Combined Input-Output Queued Crossbar Architecture for High-Radix On-Chip SwitchesIEEE Micro35(6), 38 -47, IEEE.
  14. Manousakis, I., Zakkak, F. S., Pratikakis , P., & Nikolopoulos, D.S. (2015). TProf: An energy profiler for task-parallel programsSustainable Computing: Informatics and Systems5, 1-13, Elsevier.
  15. Kitsos, I., Magoutis, K., & Tzitzikas, Y. (2014). Scalable entity-based summarization of web search results using MapReduce Distributed and Parallel Databases32(3), 405-446, Springer.
  16. Dziuma, D.D, Fatourou, P., & Kanellou, E.K. (2014). Consistency for Transactional Memory ComputingBulletin of the EATCS 113.
  17. Symeonidou, C., Pratikakis , P., Nikolopoulos, D.S., & Bilas, A. (2014). Distributed region-based memory allocation and synchronizationInternational Journal of High Performance Computing Applications28(4), 406-414 , ACM.
  18. Lyberis, S., Kalokairinos, G., Lygerakis , M., Papaefstathiou, V., Mavroidis, I., Katevenis, M.G.H., Pnevmatikatos, D., & Nikolopoulos, D.S. (2014). FPGA prototyping of emerging manycore architectures for parallel programming research using Formic boardsJournal of Systems Architecture (JSA)60(6), 481-493, Elsevier.
  19. Fatourou, P., & Kallimanis, N. (2014). Highly-Efficient Wait-Free SynchronizationTheory of Computing Systems55(3), 475-520, Springer.
  20. Papagiannis, A., & Nikolopoulos, D.S. (2014). Hybrid address spaces: A methodology for implementing scalable high-level programming models on non-coherent many-core architectures Journal of Systems and Software97, 47-64, Elsevier.
  21. Sourdis, I., Strydis, C., Armato , A., Bouganis, C.S., Falsafi, B., Gaydadjiev, G.N., Isaza, S., Malek, A., Mariani, R., Pnevmatikatos, D., Pradhan , D.K., Rauwerda, G., Seepers, R.M., Shafik, R.A., Sunesen, K., Theodoropoulos, D., Tzilis, S., & Vavouras, M. (2013). DeSyRe: On-demand system reliabilityMicroprocessors and Microsystems: Embedded Hardware Design37(8-C), 981-1001, Elsevier.
  22. Kachris, C., Nikiforos, G., Papaefstathiou, V., Kavadias, S.G., & Katevenis, M.G.H. (2013). NP-SARC: Scalable network processing in the SARC multi-core FPGA platformJournal of Systems Architecture (JSA)59(1), 39-47, Elsevier.
  23. Kornaros, G., & Pnevmatikatos, D. (2013). A survey and taxonomy of on-chip monitoring of multicore systems-on-chipACM Transactions on Design Automation of Electronic Systems (TODAES)18(2), 17:1-17:38, ACM Press.
  24. Kavadias, S.G., Katevenis, M.G.H., Zampetakis, L.A., & Nikolopoulos, D.S. (2012). Cache-Integrated Network Interfaces: Flexible On-Chip Communication and Synchronization for Large-Scale CMPs. International Journal of Parallel Programming (IJPP)40(6), 583-604, Springer (1573-7640).
  25. Passas, G., Katevenis, M.G.H., & Pnevmatikatos, D. (2012). Crossbar NoCs Are Scalable Beyond 100 Nodes. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD)31(4), 573-585, (ISSN0278-0070).
  26. Suarez Gracia, D., Dimitrakopoulos, G., Monreal, A., Katevenis, M.G.H., & Vinals Yufera, V. (2012). LP-NUCA: Networks-in-Cache for High-Performance Low-Power Embedded Processors. IEEE Transactions on Very Large Scale Integrated Systems (TVLSI)20(8), 1510-1523, (1063-8210), earlier published on-line: vol. PP, no. 99, July 2011.
  27. Klonatos, Y., Makatos, A., Marazakis, M., Flouris, M.D., & Bilas, A. (2012). Transparent online storage compression at the block-level. ACM Transactions on Storage (TOS)8(2), 5:1-5:33.
  28. Chrysos, N., & Katevenis, M.G.H. (2011). Distributed WFQ scheduling converging to weighted max-min fairness. Computer Networks: The International Journal of Computer and Telecommunications Networking 55(3), 792-806, New York, NY, USA: Elsevier North-Holland, Inc. (ISSN 1389-1286).
  29. Attiya, H., Faith, E., & Fatourou, P. (2011). The complexity of updating snapshot objects. J. Parallel Distrib. Comput.71(12), 1570-1577, Orlando, FL, USA: Academic Press, Inc. (ISSN 0743-7315).
  30. Ferrer, R., Bellens, P., Yeom, J.S., Schneider, Sc., Koukos, K., Alvanos, M., Beltran, V., González, M., Martorell, X., Badia, R.M., Nikolopoulos, D.S., Bilas, A., & Ayguade, E. (2010). Parallel Programming Models for Heterogeneous Multicore ArchitecturesIEEE Micro30(5), 42-53, (0272-1732).
  31. Luna, J., Dikaiakos, M., Marazakis, M., & Kyprianou, Th. (2010). Data-centric privacy protocol for intensive care grids. , 14(6), 1327-1337, (1089-7771).
  32. Katevenis, M.G.H., Papaefstathiou, V., Kavadias, S.G., Pnevmatikatos, D., Silla, F., & Nikolopoulos, D.S. (2010). Explicit Communication and Synchronization in SARC. IEEE Micro30(5), 30-41, (0272-1732).
  33. Flouris, M.D., Lachaize, R., Chasapis, K., & Bilas, A. (2010). Extensible block-level storage virtualization in cluster-based systems. Journal of Parallel and Distributed Computing70(8), 800-824, (07437315).
  34. Kalokairinos, G., Papaefstathiou, V., Nikiforos, G., Kavadias, S.G., Katevenis, M.G.H., Pnevmatikatos, D., & Yang, X. (2010). Prototyping a Configurable Cache/Scratchpad Memory with Virtualized User-Level RDMA Capability. Transactions on HiPEAC5(3), Springer Berlin Heidelberg.
  35. Chrysos, N.I., & Dimitrakopoulos, G. (2009). Practical high-throughput crossbar scheduling. IEEE Micro29(4), 22-35, (02721732).
  36. Schneider, Sc., Yeom, J.S., & Nikolopoulos, D.S. (2009). Programming Multiprocessors with Explicitly Managed Memory Hierarchies. Computer42(12), 28-34, Los Alamitos, CA, USA: IEEE Computer Society Press (0018-9162).
  37. Rafique, M.M., Rose, B., Butt, A.R., & Nikolopoulos, D.S. (2009). Supporting MapReduce on large-scale asymmetric multi-core clusters. SIGOPS Oper.Syst.Rev.43(2), 25-34, New York, NY, USA: ACM (0163-5980).
  38. Simos, D.G., Papaefstathiou, I., & Katevenis, M.G.H. (2008). Building an FoC using large, buffered crossbar cores. IEEE Design and Test of Computers25(6), 538-548, (07407475).
  39. Sourdis, I., Pnevmatikatos, D., & Vassiliadis, S. (2008). Scalable multigigabit pattern matching for packet inspection. IEEE Trans Very Large Scale Integr VLSI Syst16(2), 156-166, (10638210).
  40. Manifavas, C., Papaefstathiou, I., & Sotiriou, Ch.P. (2007). High throughput, low power implementations for the DES family. WSEAS Trans.Comput.6(3), 532-538, (11092750).
  41. Bosschere, K., Luk, W., Martorell, X., Navarro, N., O"Boyle, M., Pnevmatikatos, D., Ramirez, A., Sainrat, P., Seznec, A., Stenstrom, P., & Temam, O. (2007). High-Performance Embedded Architecture and Compilation Roadmap. , 4050, 5-29, Berlin / Heidelberg: Springer (978-3-540-71527-6).
  42. Ioannou, A., & Katevenis, M.G.H. (2007). Pipelined heap (priority queue) management for advanced scheduling in high-speed networks. IEEE/ACM Transactions on Netwoking15(2), 450-461, (1063-6692).
  43. Cortadella, J., Kondratyev, A., Lavagno, L., & Sotiriou, Ch.P. (2006). Desynchronization: Synthesis of Asynchronous Circuits From Synchronous Specifications. Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on25(10), 1904-1921, (0278-0070).
  44. Dobkin, R., Ginosar, R., & Sotiriou, Ch.P. (2006). High rate data synchronization in GALS SoCs. IEEE Trans Very Large Scale Integr VLSI Syst14(10), 1063-1074, (10638210).
  45. Sapountzis, G., & Katevenis, M.G.H. (2005). Benes switching fabrics with O(N)-Complexity internal backpressure. IEEE Communications Magazine43(1), 88-94, (01636804).
  46. Zhou, Y., Bilas, A., Jagannathan, S., Xinidis, D., Dubnicki, C., & Li, K. (2005). VI-attached database storage. IEEE Trans Parallel Distrib Syst16(1), 35-50, (10459219).
  47. Dobkin, R., Ginosar, R., & Sotiriou, Ch.P. (2004). Data synchronization issues in GALS SoCs. Proc.Int.Symp.Adv.Res.Asynchr.Circuits.Syst.10, 170-179, (15228681).
  48. Papaefstathiou, I., Papaefstathiou, V., & Sotiriou, Ch.P. (2004). Design-space exploration of the most widely used cryptography algorithms. Microprocessors Microsyst28(10), 561-571, (01419331).
  49. Blunno, I., Cortadella, J., Kondratyev, A., Lavagno, L., Lwin, K., & Sotiriou, Ch.P. (2004). Handshake protocols for de-synchronization. Proc.Int.Symp.Adv.Res.Asynchr.Circuits.Syst.10, 149-158, (15228681).
  50. Sotiriou, Ch.P., Ginosar, R., Stevens, K., Lavagno, L., & Heer, C. (2004). Message from the chairs. Proc.Int.Symp.Adv.Res.Asynchr.Circuits.Syst.10, (15228681).
  51. Papaefstathiou, I., Perissakis, S., Orphanoudakis, T.G., Nikolaou, N.A., Kornaros, G., Zervos, N.A., Konstantoulakis, G., Pnevmatikatos, D., & Vlachos, K. (2004). PRO3: A hybrid NPU architecture. IEEE Micro24(5), 20-33, (02721732).
  52. Pnevmatikatos, D., Sourdis, I., & Vlachos, K. (2003). An efficient, low-cost I/O subsystem for network processors. IEEE Des Test Comput20(4), 56-64, (07407475).
  53. Sartzetakis, S., Tziouvaras, Ch.I., & Georgiadis, L. (2002). Adaptive routing algorithm for lambda switching networks. Optical Networks Magazine3, 476-487.
  54. Markatos, E.P., Papachristos, Ch., & Dramitinos, G. (2002). Web-based Infrastructure for Tourism Information Systems. Informatics and Telematics, Elsevier Science (ISSN: 0736-5853).
  55. Markatos, E.P., Pnevmatikatos, D., Flouris, M.D., & Katevenis, M.G.H. (2002). Web-conscious storage management for Web proxies. IEEE/ACM Transactions on Networking10(6), 735-748, (1063-6692).
  56. Ioannidis, S., Papathanasiou, A E., Magklis, G.I., Markatos, E.P., Pnevmatikatos, D., & Sevaslidou, J.E. (2001). On using reliable network RAM in networks of workstations. , 109-120, Commack, NY, USA: Nova Science Publishers, Inc (1-59033-113-3).
  57. Katevenis, M.G.H., Sapountzis, G., Kalyvianaki, E., Mavroidis, I., & Glykopoulos, G. (2001). Wormhole IP over (connectionless) ATM. IEEE/ACM Transactions on Networking9(5), 650-661, (10636692).
  58. Dramitinos, G., & Markatos, E.P. (1999). Adaptive and Reliable Paging to Remote Main Memory. J.Parallel Distrib.Comput.58(3), 357-388, (07437315).
  59. Kornaros, G., Pnevmatikatos, D., Vatsolaki, P., Kalokairinos, G., Xanthaki, Ch., Mavroidis, D., Serpanos, D.N., & Katevenis, M.G.H. (1999). ATLAS I: Implementing a single-chip ATM switch with backpressure. IEEE Micro19(1), 30-40, (02721732).
  60. Pnevmatikatos, D., Markatos, E.P., Magklis, G.I., & Ioannidis, S. (1999). On using network RAM as a non-volatile buffer. Cluster Computing2(4), 295-303,.
  61. Ioannidis, S., Papathanasiou, A E., Magklis, G.I., Markatos, E.P., Pnevmatikatos, D., & Sevaslidou, J.E. (1999). On Using Reliable Network RAM in Networks of WorkstationsParallel and Distributed Computing Practices2(2), (1097-2803).
  62. Katevenis, M.G.H., Markatos, E.P., Vatsolaki, P., & Xanthaki, Ch. (1999). Remote Enqueue Operation on Networks of Workstations. Informatica - An International Journal of Computing and Informatics23(1), 29-39, (03505596).
  63. Flouris, M.D., & Markatos, E.P. (1999). The Network RamDisk: Using remote memory on heterogeneous NOWs. Cluster Computing2(4), 281-293.
  64. Papathanasiou, A E., Papadakakis, N., & Markatos, E.P. (1999). Visualizing Traffic on the World Wide WebWebNet Journal: Internet Technologies, Applications & Issues1(2), 57-65, Charlottesville, VA: AACE (1522-192X).
  65. Markatos, E.P., & Chronaki, C. (1998). A TOP-10 approach to prefetching on Web. Proceedings of INET"98.
  66. Katevenis, M.G.H., Serpanos, D.N., & Dimitriadis, G. (1998). ATLAS I: A single-chip, gigabit ATM switch with HIC/HS links and multi-lane back-pressure. Microprocessors and Microsystems21(7-8), 481-490, (01419331).
  67. Nastou, P.E., Serpanos, D.N., & Maritsas, D.G. (1998). Average case analysis of searching in associative processing. J.Parallel Distrib.Comput.54(2), 133-161, Orlando, FL, USA: Academic Press, Inc (0743-7315).
  68. Serpanos, D.N., Tantawi, A.N., & Tantawy, A.N. (1998). Credit scheduling: adaptive scheduling with dynamic service quota. Computer Communications21(10), 889-897, (0140-3664).
  69. Serpanos, D.N., Georgiadis, L., & Bouloutas, T. (1998). MMPacking: a load and storage balancing algorithm for distributed multimedia serversIEEE Transactions on Circuits and Systems for Video Technology8(1), 13, (1051-8215).
  70. Katevenis, M.G.H., Markatos, E.P., Kalokairinos, G., & Dollas, A. (1997). Telegraphos: a substrate for high-performance computing on workstation clustersJournal of Parallel and Distributed Computing43(2), 94-108, (0743-7315).
  71. Serpanos, D.N., Katevenis, M.G.H., & Spyridakis, E. (1997). ATLAS I: building block for ATM networks with credit-based flow control. , 162-167.
  72. Houstis, C.E., Kapidakis, S., Markatos, E.P., & Gelenbe, E. (1997). Execution of compute-intensive applications into parallel machines. Information Sciences97(1-2), 83-124, (0020-0255).
  73. Markatos, E.P. (1997). VISUALIZING WORKING SETS. Operating systems review.31(4), 3, New York, N.Y.: ACM Special Interest Group on Operating Systems] (0163-5980).
  74. Bisdikian, C., Maruyama, K., Seidman, D.I., & Serpanos, D.N. (1996). Cable access beyond the hype: on residential broadband data services over HFC networks. IEEE Communications Magazine34(11), 128-135.
  75. Katevenis, M.G.H., Vatsolaki, P., & Chalkiadakis, V. (1996). Credit-flow-controlled ATM over HIC links in the ASICCOM "ATLAS I" single-chip switch. Real-Time Magazine, 65-72.
  76. Markatos, E.P. (1996). Main memory caching of Web documents. Computer Networks and ISDN Systems28(7-11), 893-905, (0169-7552).
  77. Markatos, E.P., & Chronaki, C. (1994). Trace-Driven Simulation of Data-Alignment and Ohter Factors Affecting Update and Invalidate Based Coherent Memory. , 44-51,, IEEE Computer Society (0-8186-5292-6).
  78. Katevenis, M.G.H., Sidiropoulos, S., & Courcoubetis, C. (1991). Weighted round-robin cell multiplexing in a general-purpose ATM switch chip. IEEE J Sel Areas Commun9(8), 1265-1279, (07338716).
  79. Katevenis, M.G.H. (1987). Fast Switching and Fair Control of Congested Flow in Broadband Networks . IEEE Journal on Selected Areas in Communications (JSAC)5(8), 1315-1326, (07338716).
                  Found: 79 publications
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