Institute of Computer Science
(ICS), Foundation for Research and Technology Hellas (FORTH),
Computer Architecture and VLSI Systems Division, ICS-FORTH,
Vassilika Vouton,
P.O. Box 1385,
Heraklion,
Crete,
GR 711 10,
Greece.
Email: sotiriou@ics.forth.gr
Department of Computer Science,
University of Crete,
P.O. Box 2208,
Heraklion,
Crete,
GR 714 09,
Greece.
Email: sotiriou@csd.uoc.gr
Past Teaching:
CS-425 - Computer
Architecture
CS-523 - Electronic Design
Automation Tools for Digital VLSI Systems
CS-590.20 - System Timing
and Synchronisation
My main area of research is Asynchronous Circuit Design and Testing with emphasis on using industrial EDA tools for asynchronous design.
If you are interested in
Asynchronous Design, have a look at the ICS-FORTH Asynchronous
Circuits and Systems Design Group Home Page.
Interested in Asynchronous Circuits
implementations on FPGA? Click here to see the
DEMO of an asynchronous DLX processor on the SPARTAN 2E Xilinx.
Events
Timeline
2003
I organised the 3rd ACiD-WG
Workshop in January 2003.
2004
I chaired ASYNC 2004,
which took place in April 2004.
I am currently coordinating the EU-funded ASPIDA Project
(IST-37796).
ACiD-WG member.
VSIA member.
IEEE member.
2005
My up-to-date list of publications is here.
