Dionisios N. Pnevmatikatos

Research Interests:

Education:

While I studied in the Department of Computer Sciences of the University of Wisconsin-Madison, I was part of the Multiscalar and the Computer Architecture and VLSI groups. 

Projects

PRO3: A Protocol Processor Project. Subcontract regarding the desing & implementation of the processing core of the project.

PENED 1999: Plato: An Active Network Experimental Platform. Funded with 59 MDrx (~ $175000) by the Greek government General Secretariat for Research and Technology. ICS-FORTH budget is ~21 MDrx.

For more information: Official web site, and a small description in English.
 

Research Summary

My main interest is the architecture of computer systems. In the past I have concentrated on high-performance processors and specificaly on the execution of branch instructions.

At FORTH I work on the design and implementation of a high-performance ATM switch called ATLAS I. ATLAS I is a 16x16 single chip ATM switch that provides advanced flow control (multilane back-pressure), a large on-chip cell buffer (256 cells), aggregate bandwidth of 10Gb/s and supports three priority levels, multiple logical queues and efficient multicasting. ATLAS I was designed in a 0.35micron CMOS process using 6 million transistors, and was taped-out for fabrication on November 1998.

ATLAS I die photo

ATLAS I die photo: 15x15mm

Earlier I have worked on the design of high performance processors, and more specifically with the problem of branch instructions. It is well known and understood that branch instructions limit the performance of Instruction Level Parallel (ILP) processors. The most common way of aleviate these limitations is to perform dynamic branch prediction. My research combined dynamic branch prediction with the use of predicated instructions. This approach gives advantages since the compiler can use predicated instructions to "eliminate" branches that yield low prediction accuracy and the processor can still use dynamic branch prediction for the remaining branches. 

Publications

Citations to this work: 53 (from selected journals and conferences only, excluding self-references). A detailed list is also available.

Book Chapters:

  1. ``On Using Reliable Network RAM in Networks of Workstations'' Sotiris Ioannidis, Athanasios Papathanasiou, Gregorios Maglis, Evangelos Markatos, Dionisios Pnevmatikatos, and Julia Sevaslidou, , Cluster Computing, pp. 109-121, Chapter 10, 2001, ISBN 1-59033-113-3, Nova Science Publishers, USA

Journal Publications:

  1. ``On Using Network RAM as a non-volatile Buffer'', Dionisios Pnevmatikatos, Evangelos Markatos, Gregory Maglis, and Sotiris Ioannidis, Cluster Computing, Special Issue on I/O in Shared-Storage Clusters, 2(4), pp. 295-303, 1999, Baltzer Science Publishers.
  2. ``On Using Reliable Network RAM in Networks of Workstations'', Sotiris Ioannidis, Athanasios Papathanasiou, Gregorios Maglis, Evangelos Markatos, Dionisios Pnevmatikatos, and Julia Sevaslidou, Parallel and Distributed Computing Practices (PDCP), Special Issue on High Performance Computing on Clusters, 2(2), pp. 205-213, 1999, ISSN 1097-2803, Nova Science Publishers, USA, 1999.
  3. ``Implementation of ATLAS I: a Single-Chip ATM Switch with Backpressure'', Georgios Kornaros, Dionisios Pnevmatikatos, Panagiota Vatsolaki, Georgios Kalokerinos, Chara Xanthaki, Dimitrios Mavroidis, Dimitrios Serpanos, and Manolis Katevenis, IEEE-Micro , Vol. 19, n. 1, pp. 30-41, February 1999.
  4. ``Cache Performance of the SPEC-92 Benchmark Suite'', Jeffrey D. Gee, Mark D. Hill, Dionisios N. Pnevmatikatos and Alan Jay Smith, IEEE Micro, August 1993.

Refereed Conference Publications:

  1. ``Experimental Testing of PLATO, a Reconfigurable Active ATM Network Nodes'', A. Dollas, D. Pnevmatikatos, N. Aslanides, E. Sotiriades, S. Kavvadias, S. Zogopoulos, In Proceedings of the 8th Panhellenic Informatics Conference, Cyprus, November, 2001.
  2. ``Slice-Processors: An Implementation of Operation-based Prediction'', Andreas Moshovos, Dionisios Pnevmatikatos, Amirali Baniasadi, In Proceedings of the 15th ACM International Conference on Supercomputing (ICS), Sorrento, Naples, Italy, June, 16 - 21, 2001, ACM.
  3. ``Rapid Prototyping of Reusable 4x4 Active ATM Switch Core with the PCI Pamette'', A. Dollas, D. Pnevmatikatos, N. Aslanides, S. Kavvadias, E. Sotiriades, K. Papademetriou, In Proceedings, 12th International IEEE Workshop on Rapid System Prototyping (RSP-2001), pp. 17-23, Monterey, CA, June 25-27, 2001, IEEE.
  4. ``Architecture and Applications of PLATO, a Reconfigurable Active Network Platform'', A. Dollas, D. Pnevmatikatos, N. Aslanides, S. Kavvadias, E. Sotiriades, S. Zogopoulos, K. Papademetriou, N. Chrysos, K. Harteros, E. Antonidakis, N. Petrakis, In Proceedings, 9th International IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM-2001), Rohnert Park, CA, April 30 - May 2, 2001, IEEE.
  5. ``Secondary Storage Management for Web Proxies'', Evangelos Markatos, Manolis Katevenis, Dionisios Pnevmatikatos and Michail Flouris, Accepted for publication in the 2nd USENIX Symposium on Internet Technologies and Systems (USITS '99), Boulder, CO, USA, October 12-13, 1999, USENIX.
  6. ``ATLAS II: Optimizing a 10Gbps Single-chip ATM Switch'', Dionisios Pnevmatikatos and Georgios Kornaros, 12th Annual 1999 IEEE International ASIC/SOC Conference, Washington, DC, USA, September 15-18, 1999, IEEE.
  7. ``The Memory Structures of ATLAS I, a High Performance, 16x16 ATM Switch Supporting Backpressure'', Dionisios Pnevmatikatos, Georgios Kornaros, George Kalokerinos, and Chara Xanthaki, Proceedings of the 11th Annual IEEE International ASIC/SOC Conference, Rochester, NY, September 13-16, 1998.
  8. ``On Optimizing ATLAS I, A 10 Gbps ATM Switch'', Georgios Kornaros, Dionisios Pnevmatikatos, Dimitrios Mavroidis, Peni Vatsolaki, George Kalokerinos, Chara Xanthaki, Georgios Dimitriadis, In Proceedings of the 7-th Hellenic Conference on Informatics (HCI), Ioannina, Greece, August 26-29, 1999, pp. IV.50-IV.60.
  9. ``Implementation of ATLAS I: a Single-Chip ATM Switch with Backpressure'', Georgios Kornaros, Dionisios Pnevmatikatos, Panagiota Vatsolaki, Georgios Kalokerinos, Chara Xanthaki, Dimitrios Mavroidis, Dimitrios Serpanos, and Manolis Katevenis, Proceedings of the Hot Interconnects VI Symposium , Stanford, CA, August 1998.
  10. ``Streamlining Data Cache Access with Fast Address Calculation'', Todd Austin, Dionisios N. Pnevmatikatos and Gurindar S. Sohi, Proceedings of the 22nd Annual International Symposium on Computer Architecture, Santa Margherita Ligure, Italy, June 1995.
  11. ``Guarded Execution and Branch Prediction for Dynamic ILP Processors'', Dionisios N. Pnevmatikatos and Gurindar S. Sohi, Proceedings of the 21st Annual International Symposium on Computer Architecture, Chicago, IL, April 1994.
  12. ``Control Flow Prediction for Dynamic ILP Processors'', Dionisios N. Pnevmatikatos, Manoj Franklin and Gurindar S. Sohi, Proceedings of the 26th International Symposium on Microarchitecture, Austin, TX, December 1993.

Technical Reports & Thesis:

  1. Dionisios N. Pnevmatikatos, and Mark D. Hill, ``Cache Performance of the Integer SPEC Benchmarks on a RISC,'' Computer Architecture News, ACM SIGARCH, Vol. 18, No. 2, July 1990.
  2. ``On Using Network RAM as a non-volatile Buffer'', Dionisios Pnevmatikatos, Evangelos P. Markatos, Gregory Maglis, Sotiris Ioannidis, Technical report no 227, ICS-FORTH, Heraklion, Crete, Greece, August 1998. Also available in compressed postscript.
  3. Ph.D. thesis: ``Incorporating Guarded Execution in Existing Instruction Sets'', Dionisios N. Pnevmatikatos. Advisor Gurindar S. Sohi.

Patents

"Data Cache Fast Address Calculation System and Method'', Inventors: Todd M. Austin, Dionisios N. Pnevmatikatos, and Gurindar S. Sohi, USA Patent Number 5,860,151 (January 12 1999). 

pnevmati ** at ** ics . forth . gr