Technical & Research Reports

ICS-FORTH Technical Reports

• Katevenis, M.G.H., Vatsolaki, P., Serpanos, D.N., & Markatos, E.P. (1997). ATLAS I: A Single-chip ATM switch for NOWs. 1997.CANPC97.ATLAS.ps.gz
• Katevenis, M.G.H. (1997). Buffer Requirements of Credit-Based Flow Control when a Minimum Draining Rate is Guaranteed. 1997.HPCS97.drain_cr_buf.ps.gz
• Markatos, E.P., Katevenis, M.G.H., Kalokairinos, G., Magklis, G.I., Milolidakis, G., & Oikonomou, Th. (1997). Issues in the Design and Implementation of User-Level DMA. 1997.TR182.UDMA.ps.gz
• Papathanasiou, A E., & Markatos, E.P. (1997). Lightweight Transactions on Networks of Workstations. 1997.TR209.Lightweight_Transactions_on_NOWs.ps.gz
• Katevenis, M.G.H., Serpanos, D.N., & Markatos, E.P. (1997). Multi-Queue Management and Scheduling for Improved QoS in Communication Networks. 1997.EMMSEC.Muqpro.ps.gz
• Ioannidis, S., Markatos, E.P., & Sevaslidou, J.E. (1997). On using Network Memory to Improve the Performance of Transaction-Based Systems. 1997.TR190.Remote_memory_RVM.ps.gz
• Kornaros, G., Kozyrakis, Ch., Vatsolaki, P., & Katevenis, M.G.H. (1997). Pipelined Multi-Queue Management in a VLSI ATM Switch Chip with Credit-Based Flow-Control. 1997.ARVLSI.Pipe_MultiQueue.ps.gz
• Artavanis, M. (1997). Simulation of the Shared Disks Architecture for Transaction Processing Systems. 1997.TR211.Simulation_SharedDisks_Archit_Transaction_Processing_Systems.ps.gz
• Katevenis, M.G.H., Serpanos, D.N., & Spyridakis, E. (1997). Switching Fabrics with Internal Backpressure using the ATLAS I Single-Chip ATM Switch. 1997.GLOBECOM.ATLAS_I_Fabrics.ps.gz
• Markatos, E.P., & Katevenis, M.G.H. (1997). User-Level DMA without Operating System Kernel Modification. 1997.HPCA97.user_level_dma.ps.gz
• Markatos, E.P. (1997). Visualizing Working Sets. 1997.TR192.Visualizing_working_sets.ps.gz