Technical & Research Reports

ICS-FORTH Technical Reports

• Efthymiou, A. (1995). Design, Implementation, and Testing of a 25 Gb/s Pipelined Memory Switch Buffer in Full-custom CMOS. 1995.TR143.Design_Implementation_25Gbs_PipelinedMem_Switch_Buffer.ps.gz
• Markatos, E.P., Dramitinos, G., & Papachristos, K. (1995). Implementation and Evaluation of a Remote Memory Pager. 1995.TR129.remote_memory_paging.ps.gz
• Labrinidis, A. (1995). Methods to cluster transactions into utilization classes with similar workload characteristics. 1995.TR135.Methods_cluster_transactions_similar_workload_characteristics.ps.gz
• Katevenis, M.G.H., Vatsolaki, P., & Efthymiou, A. (1995). Pipelined Memory Shared Buffer for VLSI Switches. 1995.SIGCOMM95.PipeMemoryShBuf.ps.gz
• Katevenis, M.G.H., Vatsolaki, P., Efthymiou, A., & Stratakis, M. (1995). VC-level Flow Control and Shared Buffering in the Telegraphos Switch. 1995.HOTI.VCflowCtrlTeleSwitch.ps.gz

M.S. Theses

• Sareidakis, T. (1995). Array Tracer: A Parallel Performance Analysis Tool. November 1995
• Efthymiou, A. (1995). Design of a 25 Gbits/sec Pipelined Menory for Shared Buffer Network Switches. November 1995
• Marazakis, M. (1995). Simulation and Transaction Processing Systems and A Study of Methods for Performance Goal Satisfaction. November 1995
• Lamprinidis, A. (1995). Μέθοδοι Ταξινόμησης Δοσοληψιών σε Ομάδες με Παρόμοια Χαρακτηριστικά Φόρτου Εργασίας. November 1995