Asynchronous Circuit and System Design Group

Asynchronous Open-Source DLX Processor (ASPIDA)

Desynchronization: an easy approach to Asynchronous design

In the pages proceeding, we will try to explain some thundamentals princliples of the desynchronization model, such as non-overlaping and overlaping designing methods. In addition to that, some basic properties of asynchronous circuits will be presented in order for the reader to understand easier our attemps of desynchronization. For more information, please read the following references:

J. Cortadella, A. Kondratyev, L. Lavagno and C. Sotiriou. A Concurrent Model for De-synchronization. In Handouts of the International Workshop on Logic Synthesis, pages 294-301, 2003. (pdf)
I. Blunno, J. Cortadella, A. Kondratyev, K. Lwin and C. Sotiriou. Handshake Protocols for De-synchronization. In Proceedings of the 10th International Synposium on Asynchronous Circuits and Systems, April 2004. (pdf)